Improvement of SPICE based ESD Protection Models for I/O Protection Modeling

Amin Pak; Seyed Mostafa Mousavi; David Pommerenke; Giorgi Maghlakelidze; Yang Xu

doi:10.1109/EMC/SI/PI/EMCEurope52599.2021.9559224

Improvement of SPICE based ESD Protection Models for I/O Protection Modeling

Amin Pak, Seyed Mostafa Mousavi, David Pommerenke, Giorgi Maghlakelidze, Yang Xu

Research output: Conference proceeding/Chapter in Book/Report/ › Conference Paper › peer-review

Abstract

Modeling ESD protection using the System Efficient ESD Design (SEED) methodology enables optimal protection of an IO using TVS and external components. The success of modeling depends on the accuracy of the models. This work shows improvements to SPICE models used to characterize TVS diodes and IC I/O. The improvement is twofold. The transition phases between snapback and main current flow have been adjusted to achieve realistic waveforms for the rise times from 500 ps to 5 ns in a voltage range from Vt1 to the high current region, and complex curvatures of the IV curve are included. The model is capable of operating in generic SPICE and being tested in ADS and LT-SPICE. The paper explains this in detail to enable the reader to apply this modeling principle.

Original language	English
Title of host publication	2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium
Pages	1006-1011
Number of pages	6
DOIs	https://doi.org/10.1109/EMC/SI/PI/EMCEurope52599.2021.9559224
Publication status	Published - 13 Aug 2021
Externally published	Yes
Event	2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium - Raleigh, NC, USA Duration: 26 Jul 2021 → 13 Aug 2021

Conference

Conference	2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium
Period	26/07/21 → 13/08/21

Keywords

TV
Voltage measurement
Design methodology
Modulation
Europe
SPICE
Electromagnetic compatibility

Access to Document

10.1109/EMC/SI/PI/EMCEurope52599.2021.9559224

https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9559224

Cite this

@inproceedings{8db29f4dd41d4eafb1d5ce979f60179f,

title = "Improvement of SPICE based ESD Protection Models for I/O Protection Modeling",

abstract = "Modeling ESD protection using the System Efficient ESD Design (SEED) methodology enables optimal protection of an IO using TVS and external components. The success of modeling depends on the accuracy of the models. This work shows improvements to SPICE models used to characterize TVS diodes and IC I/O. The improvement is twofold. The transition phases between snapback and main current flow have been adjusted to achieve realistic waveforms for the rise times from 500 ps to 5 ns in a voltage range from Vt1 to the high current region, and complex curvatures of the IV curve are included. The model is capable of operating in generic SPICE and being tested in ADS and LT-SPICE. The paper explains this in detail to enable the reader to apply this modeling principle.",

keywords = "TV, Voltage measurement, Design methodology, Modulation, Europe, SPICE, Electromagnetic compatibility",

author = "Amin Pak and Mousavi, {Seyed Mostafa} and David Pommerenke and Giorgi Maghlakelidze and Yang Xu",

year = "2021",

month = aug,

day = "13",

doi = "10.1109/EMC/SI/PI/EMCEurope52599.2021.9559224",

language = "English",

isbn = "978-1-6654-4889-5",

pages = "1006--1011",

booktitle = "2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium",

note = "2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium ; Conference date: 26-07-2021 Through 13-08-2021",

}

Pak, A, Mousavi, SM, Pommerenke, D, Maghlakelidze, G & Xu, Y 2021, Improvement of SPICE based ESD Protection Models for I/O Protection Modeling. in 2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium., 9559224, pp. 1006-1011, 2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium, 26/07/21. https://doi.org/10.1109/EMC/SI/PI/EMCEurope52599.2021.9559224

TY - GEN

T1 - Improvement of SPICE based ESD Protection Models for I/O Protection Modeling

AU - Pak, Amin

AU - Mousavi, Seyed Mostafa

AU - Pommerenke, David

AU - Maghlakelidze, Giorgi

AU - Xu, Yang

PY - 2021/8/13

Y1 - 2021/8/13

N2 - Modeling ESD protection using the System Efficient ESD Design (SEED) methodology enables optimal protection of an IO using TVS and external components. The success of modeling depends on the accuracy of the models. This work shows improvements to SPICE models used to characterize TVS diodes and IC I/O. The improvement is twofold. The transition phases between snapback and main current flow have been adjusted to achieve realistic waveforms for the rise times from 500 ps to 5 ns in a voltage range from Vt1 to the high current region, and complex curvatures of the IV curve are included. The model is capable of operating in generic SPICE and being tested in ADS and LT-SPICE. The paper explains this in detail to enable the reader to apply this modeling principle.

AB - Modeling ESD protection using the System Efficient ESD Design (SEED) methodology enables optimal protection of an IO using TVS and external components. The success of modeling depends on the accuracy of the models. This work shows improvements to SPICE models used to characterize TVS diodes and IC I/O. The improvement is twofold. The transition phases between snapback and main current flow have been adjusted to achieve realistic waveforms for the rise times from 500 ps to 5 ns in a voltage range from Vt1 to the high current region, and complex curvatures of the IV curve are included. The model is capable of operating in generic SPICE and being tested in ADS and LT-SPICE. The paper explains this in detail to enable the reader to apply this modeling principle.

KW - TV

KW - Voltage measurement

KW - Design methodology

KW - Modulation

KW - Europe

KW - SPICE

KW - Electromagnetic compatibility

UR - https://ieeexplore.ieee.org/document/9559224/

U2 - 10.1109/EMC/SI/PI/EMCEurope52599.2021.9559224

DO - 10.1109/EMC/SI/PI/EMCEurope52599.2021.9559224

M3 - Conference Paper

SN - 978-1-6654-4889-5

SP - 1006

EP - 1011

BT - 2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium

T2 - 2021 IEEE International Joint EMC/SI/PI and EMC Europe Symposium

Y2 - 26 July 2021 through 13 August 2021

ER -

Improvement of SPICE based ESD Protection Models for I/O Protection Modeling

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Keywords

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