Generalized Execution Time Estimation

Andreas Rechberger; Eugen Brenner

doi:10.1109/SIES.2018.8442107

Generalized Execution Time Estimation

Andreas Rechberger, Eugen Brenner

Research output: Conference proceeding/Chapter in Book/Report/ › Conference Paper › peer-review

Abstract

While developing embedded devices a significant challenge is to choose the appropriate computing architecture. Especially during early design stages providing measurable metric on the performance demands to implement a specified algorithm is required. Usually this includes a large amount of target dependency, like the chosen micro-controller platform. This work aims on providing a generalized method to estimate the processing time of a dedicated algorithm, when being run on a variety of hardware choices. The focus is on a fast exploration of the hardware design space in order to provide guidance for selecting a suitable processing platform.

Original language	English
Title of host publication	2018 IEEE 13th International Symposium on Industrial Embedded Systems (SIES)
Pages	1-4
Number of pages	4
DOIs	https://doi.org/10.1109/SIES.2018.8442107
Publication status	Published - 8 Jun 2018
Externally published	Yes
Event	2018 IEEE 13th International Symposium on Industrial Embedded Systems (SIES) - Graz, Austria Duration: 6 Jun 2018 → 8 Jun 2018

Conference

Conference	2018 IEEE 13th International Symposium on Industrial Embedded Systems (SIES)
Period	6/06/18 → 8/06/18

Keywords

Registers
Hardware
Estimation
Finite impulse response filters
Indexes
Random access memory
Signal processing algorithms

Access to Document

10.1109/SIES.2018.8442107

https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8442107

Cite this

@inproceedings{b520bd7f10634b62a2fd87d1e4b5b1c5,

title = "Generalized Execution Time Estimation",

abstract = "While developing embedded devices a significant challenge is to choose the appropriate computing architecture. Especially during early design stages providing measurable metric on the performance demands to implement a specified algorithm is required. Usually this includes a large amount of target dependency, like the chosen micro-controller platform. This work aims on providing a generalized method to estimate the processing time of a dedicated algorithm, when being run on a variety of hardware choices. The focus is on a fast exploration of the hardware design space in order to provide guidance for selecting a suitable processing platform.",

keywords = "Registers, Hardware, Estimation, Finite impulse response filters, Indexes, Random access memory, Signal processing algorithms",

author = "Andreas Rechberger and Eugen Brenner",

year = "2018",

month = jun,

day = "8",

doi = "10.1109/SIES.2018.8442107",

language = "English",

isbn = "978-1-5386-4156-9",

pages = "1--4",

booktitle = "2018 IEEE 13th International Symposium on Industrial Embedded Systems (SIES)",

note = "2018 IEEE 13th International Symposium on Industrial Embedded Systems (SIES) ; Conference date: 06-06-2018 Through 08-06-2018",

}

TY - GEN

T1 - Generalized Execution Time Estimation

AU - Rechberger, Andreas

AU - Brenner, Eugen

PY - 2018/6/8

Y1 - 2018/6/8

N2 - While developing embedded devices a significant challenge is to choose the appropriate computing architecture. Especially during early design stages providing measurable metric on the performance demands to implement a specified algorithm is required. Usually this includes a large amount of target dependency, like the chosen micro-controller platform. This work aims on providing a generalized method to estimate the processing time of a dedicated algorithm, when being run on a variety of hardware choices. The focus is on a fast exploration of the hardware design space in order to provide guidance for selecting a suitable processing platform.

AB - While developing embedded devices a significant challenge is to choose the appropriate computing architecture. Especially during early design stages providing measurable metric on the performance demands to implement a specified algorithm is required. Usually this includes a large amount of target dependency, like the chosen micro-controller platform. This work aims on providing a generalized method to estimate the processing time of a dedicated algorithm, when being run on a variety of hardware choices. The focus is on a fast exploration of the hardware design space in order to provide guidance for selecting a suitable processing platform.

KW - Registers

KW - Hardware

KW - Estimation

KW - Finite impulse response filters

KW - Indexes

KW - Random access memory

KW - Signal processing algorithms

UR - https://ieeexplore.ieee.org/document/8442107/

U2 - 10.1109/SIES.2018.8442107

DO - 10.1109/SIES.2018.8442107

M3 - Conference Paper

SN - 978-1-5386-4156-9

SP - 1

EP - 4

BT - 2018 IEEE 13th International Symposium on Industrial Embedded Systems (SIES)

T2 - 2018 IEEE 13th International Symposium on Industrial Embedded Systems (SIES)

Y2 - 6 June 2018 through 8 June 2018

ER -

Generalized Execution Time Estimation

Abstract

Conference

Keywords

Access to Document

Other files and links

Fingerprint

Cite this