Automatic Creation of TVS SPICE Models for ESD System Level Simulations

Lukas Pertoll; Amin Pak; David Pommerenke

doi:10.1109/EMCEurope57790.2023.10274181

Automatic Creation of TVS SPICE Models for ESD System Level Simulations

Lukas Pertoll, Amin Pak, David Pommerenke

Research output: Conference proceeding/Chapter in Book/Report/ › Conference Paper › peer-review

Abstract

The development and implementation of an algorithm for the automatic generation of a complete system-efficient ESD design (SEED) model for transient voltage suppressors (TVS), is presented. The algorithm uses transmission line pulse measurement data and S-parameter measurements to compute values for a small-signal model, IV curve model, and transient model. These models are combined into a single schematic to simulate the complete behavior of the device under test (DUT). The algorithm is constrained to TVS diodes without snapback and varistors, the resulting model matches the measured device behavior with high accuracy.

Original language	English
Title of host publication	2023 International Symposium on Electromagnetic Compatibility – EMC Europe
Pages	1-6
Number of pages	6
DOIs	https://doi.org/10.1109/EMCEurope57790.2023.10274181
Publication status	Published - 8 Sept 2023
Externally published	Yes
Event	2023 International Symposium on Electromagnetic Compatibility – EMC Europe - Krakow, Poland Duration: 4 Sept 2023 → 8 Sept 2023

Conference

Conference	2023 International Symposium on Electromagnetic Compatibility – EMC Europe
Period	4/09/23 → 8/09/23

Keywords

Varistors
TV
Pulse measurements
Computational modeling
Transmission line measurements
Electrostatic discharges
Electromagnetic compatibility

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10.1109/EMCEurope57790.2023.10274181

https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10274181

Cite this

@inproceedings{5378b826ef2344a5b2c556042828010d,

title = "Automatic Creation of TVS SPICE Models for ESD System Level Simulations",

abstract = "The development and implementation of an algorithm for the automatic generation of a complete system-efficient ESD design (SEED) model for transient voltage suppressors (TVS), is presented. The algorithm uses transmission line pulse measurement data and S-parameter measurements to compute values for a small-signal model, IV curve model, and transient model. These models are combined into a single schematic to simulate the complete behavior of the device under test (DUT). The algorithm is constrained to TVS diodes without snapback and varistors, the resulting model matches the measured device behavior with high accuracy.",

keywords = "Varistors, TV, Pulse measurements, Computational modeling, Transmission line measurements, Electrostatic discharges, Electromagnetic compatibility",

author = "Lukas Pertoll and Amin Pak and David Pommerenke",

year = "2023",

month = sep,

day = "8",

doi = "10.1109/EMCEurope57790.2023.10274181",

language = "English",

isbn = "979-8-3503-2401-3",

pages = "1--6",

booktitle = "2023 International Symposium on Electromagnetic Compatibility – EMC Europe",

note = "2023 International Symposium on Electromagnetic Compatibility – EMC Europe ; Conference date: 04-09-2023 Through 08-09-2023",

}

TY - GEN

T1 - Automatic Creation of TVS SPICE Models for ESD System Level Simulations

AU - Pertoll, Lukas

AU - Pak, Amin

AU - Pommerenke, David

PY - 2023/9/8

Y1 - 2023/9/8

N2 - The development and implementation of an algorithm for the automatic generation of a complete system-efficient ESD design (SEED) model for transient voltage suppressors (TVS), is presented. The algorithm uses transmission line pulse measurement data and S-parameter measurements to compute values for a small-signal model, IV curve model, and transient model. These models are combined into a single schematic to simulate the complete behavior of the device under test (DUT). The algorithm is constrained to TVS diodes without snapback and varistors, the resulting model matches the measured device behavior with high accuracy.

AB - The development and implementation of an algorithm for the automatic generation of a complete system-efficient ESD design (SEED) model for transient voltage suppressors (TVS), is presented. The algorithm uses transmission line pulse measurement data and S-parameter measurements to compute values for a small-signal model, IV curve model, and transient model. These models are combined into a single schematic to simulate the complete behavior of the device under test (DUT). The algorithm is constrained to TVS diodes without snapback and varistors, the resulting model matches the measured device behavior with high accuracy.

KW - Varistors

KW - TV

KW - Pulse measurements

KW - Computational modeling

KW - Transmission line measurements

KW - Electrostatic discharges

KW - Electromagnetic compatibility

UR - https://ieeexplore.ieee.org/document/10274181/

U2 - 10.1109/EMCEurope57790.2023.10274181

DO - 10.1109/EMCEurope57790.2023.10274181

M3 - Conference Paper

SN - 979-8-3503-2401-3

SP - 1

EP - 6

BT - 2023 International Symposium on Electromagnetic Compatibility – EMC Europe

T2 - 2023 International Symposium on Electromagnetic Compatibility – EMC Europe

Y2 - 4 September 2023 through 8 September 2023

ER -

Automatic Creation of TVS SPICE Models for ESD System Level Simulations

Abstract

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Keywords

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