Abstract
A single-chip zero-IF UMTS receiver for the band classes I, II, and V is presented. The mixed-signal receiver comprises in the analog front-end two self-matched LNAs, an I/Q-mixer, and a fully-integrated DeltaSigma-fractional-N PLL with VCO. Hence, minimum external component count is achieved. The I/Q-ADCs and a digital front-end (DFE) located on the same die enables a shift of signal processing formerly performed in the analog front-end into preferred digital domain. The DFE's functionality mainly includes sample-rate conversion, channel filtering, dynamic range control and matched filtering. Through a high-speed digital serial interface the received and down-converted signal is finally further transmitted to the baseband IC. The presented RFIC, which is controlled via an integrated three-wire-bus interface, is realized in a 0.13 mum RF- CMOS process and occupies a die size of 8 mm . Measured key figures of merit show an NF of 7.8 dB at 48 dB gain of the analog part in band V and a maximum error-vector-magnitude (EVM) of 3.9%.
Originalsprache | Englisch |
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Titel | 2008 IEEE International Symposium on Circuits and Systems |
Herausgeber (Verlag) | IEEE Computer Society |
Seiten | 972-975 |
Seitenumfang | 4 |
ISBN (Print) | 978-1-4244-1684-4 |
DOIs | |
Publikationsstatus | Veröffentlicht - 21 Mai 2008 |
Extern publiziert | Ja |
Veranstaltung | 2008 IEEE International Symposium on Circuits and Systems - Seattle, WA, USA Dauer: 18 Mai 2008 → 21 Mai 2008 |
Konferenz
Konferenz | 2008 IEEE International Symposium on Circuits and Systems |
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Zeitraum | 18/05/08 → 21/05/08 |