TY - JOUR
T1 - A Single-Chip Dual-Band CDMA2000 Transceiver in 0.13 $\mu{\hbox{m}}$ CMOS
AU - Zipper, Josef
AU - Stoger, Claus
AU - Hueber, Gernot
AU - Vazny, Rastislav
AU - Schelmbauer, Werner
AU - Adler, Bernd
AU - Hagelauer, Richard
PY - 2007/12/1
Y1 - 2007/12/1
N2 - A single-chip, dual-band transceiver for CDMA2000 is presented. The design supporting the North American cellular and PCS bands features a complete zero-IF receiver, a direct-conversion transmitter and two fully integrated synthesizers with VCOs. The analog receiver front-end comprises two self-matched wideband LNAs, a highly linear demodulator and a third-order baseband filter. In a test version I/Q ADCs and a digital front-end (DFE) to provide channel and matched filtering are included to demonstrate the performance of a fully integrated analog/digital line-up. Measured maximum SNR values of 23 dB and 25 dB for PCS and Cell bands, respectively, are achieved. The transmitter comprises baseband buffers and filters, an I/Q-modulator and separate output drivers for each band. An analog gain control (AGC) for realization of a dynamic range is implemented and a maximum output power of at a total CDG4 urban current of 34 mA is achieved for the PCS band. Measured ACPR1 and values are and 0.998 for the Cell band and and 0.995 for the PCS band, respectively. The chip is fabricated in a 0.13 RF-CMOS process, occupies a die size of 8.4 and operates with a 2.5 V supply.
AB - A single-chip, dual-band transceiver for CDMA2000 is presented. The design supporting the North American cellular and PCS bands features a complete zero-IF receiver, a direct-conversion transmitter and two fully integrated synthesizers with VCOs. The analog receiver front-end comprises two self-matched wideband LNAs, a highly linear demodulator and a third-order baseband filter. In a test version I/Q ADCs and a digital front-end (DFE) to provide channel and matched filtering are included to demonstrate the performance of a fully integrated analog/digital line-up. Measured maximum SNR values of 23 dB and 25 dB for PCS and Cell bands, respectively, are achieved. The transmitter comprises baseband buffers and filters, an I/Q-modulator and separate output drivers for each band. An analog gain control (AGC) for realization of a dynamic range is implemented and a maximum output power of at a total CDG4 urban current of 34 mA is achieved for the PCS band. Measured ACPR1 and values are and 0.998 for the Cell band and and 0.995 for the PCS band, respectively. The chip is fabricated in a 0.13 RF-CMOS process, occupies a die size of 8.4 and operates with a 2.5 V supply.
KW - Dual band
KW - Transceivers
KW - Personal communication networks
KW - Transmitters
KW - Baseband
KW - Synthesizers
KW - Wideband
KW - Demodulation
KW - Nonlinear filters
KW - Testing
UR - https://ieeexplore.ieee.org/document/4381468/
U2 - 10.1109/JSSC.2007.908750
DO - 10.1109/JSSC.2007.908750
M3 - Article
SN - 1558-173X
VL - 42
SP - 2785
EP - 2794
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
IS - 12
M1 - 4381468
ER -