A case study of BAG2 automized layout generation methodologies for a two-stage OTA in 28nm TSMC technology

Fatemeh Abbassi, Mirjana Videnovic-Misic, Mudasir Bashir, Feifei Zhang, Timm Ostermann, Gernot Hueber

Publikation: Konferenzband/Beitrag in Buch/BerichtKonferenzartikelBegutachtung

Abstract

Due to the increased interest in the design automation tools, Berkeley Analog Generator (BAG) - an automated analog generator methodology, is selected for this case study. Process portable (schematic, layout, and testbench) generators are implemented in this framework for a conventional two-stage Operational Transconductance Amplifier (OTA) structure. This article discusses limitations
within the BAG2 XBase tool identified during the implementation of three different layout generators by utilizing different analog layout techniques. A two-stage OTA with diodeconnected and negative-gm load instances designed in TSMC 28nm CMOS technology reaches 0.47 mW from a 1 V supply in the typical corner. The amplifier shows the pre-layout performance of 39.1dB DC gain, 22MHz 3dB BW, 884MHz GBW product, and 65.5-degree phase margin. The post-layout simulation results for each generator are compared paving the way to the selection of appropriate layout practice for targeted layout application/circuit topology.
OriginalspracheEnglisch
TitelAustrochip 2021
Seiten29-32
Seitenumfang4
DOIs
PublikationsstatusVeröffentlicht - 2021

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