Architecture and Algorithm Co-Design Framework for Embedded Processors in Event-Based Cameras

Jonah P. Sengupta, Martin Villemur, Daniel R. Mendat, Gaspar Tognetti, Andreas G. Andreou

Research output: Conference proceeding/Chapter in Book/Report/Conference Paperpeer-review

Abstract

Neuromorphic cameras that offer low latency and dynamic scene sensing are emerging as a viable technology for energy-aware embedded perceptual systems. In this paper we report on neuromorphic architecture and algorithm exploration for an event-based accelerator for neuromorphic cameras. The system includes a RISC-V CPU and associated peripherals that capture and process event-based visual data coming from a neuromorphic dynamic vision sensor. Mapped into a reconfigurable computing platform (FPGA), we demonstrate a set of event-based visual processing tasks including noise filtering, corner detection, and object tracking.
Original languageEnglish
Title of host publication2021 IEEE International Symposium on Circuits and Systems (ISCAS)
PublisherIEEE Computer Society
Pages1-5
Number of pages5
ISBN (Print)978-1-7281-9201-7
DOIs
Publication statusPublished - 28 May 2021
Event2021 IEEE International Symposium on Circuits and Systems (ISCAS) - Daegu, Korea
Duration: 22 May 202128 May 2021

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2021-May

Conference

Conference2021 IEEE International Symposium on Circuits and Systems (ISCAS)
Period22/05/2128/05/21

Keywords

  • Visualization
  • Program processors
  • Neuromorphics
  • Heuristic algorithms
  • Computer architecture
  • Cameras
  • Object tracking

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