Abstract
This paper demonstrates a wideband 2.4 GHz $2\times 9$ -bit Cartesian radio-frequency digital-to-analog converter (RFDAC). Active-under-coil integration is introduced in the physical implementation, where all key active circuitry is located underneath the matching-network transformer, achieving a core area of merely 0.35 mm2. An $8\times $ analog linear interpolation at the RF rate is proposed to suppress replicas close to the carrier while avoiding any high-order and high-speed digital filters in digital processing back-end. The multi-port transformer is adopted in the matching network to improve the back-off efficiency. The measured peak output power and drain efficiency at the center frequency of 2.4 GHz are 17.47 dBm and 17.6% respectively, while the peak efficiency is 19.03%. Moreover, the 6-dB back-off efficiency is at 66% of that at the peak output power. The active-under-coil integration helps this RFDAC to achieve the smallest area among comparable prior arts.
Original language | English |
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Article number | 9361220 |
Pages (from-to) | 1855-1868 |
Number of pages | 14 |
Journal | IEEE Transactions on Circuits and Systems I: Regular Papers |
Volume | 68 |
Issue number | 5 |
DOIs | |
Publication status | Published - 1 May 2021 |
Keywords
- Interpolation
- Baseband
- Radio frequency
- Power generation
- Silicon
- Harmonic analysis
- Transmitters