A 24 ​GHz PLL with low phase noise for 60 ​GHz Sliding-IF transceiver in a 65-nm CMOS

A 24 GHz PLL with low phase noise for 60 GHz Sliding-IF transceiver in a 65-nm CMOS

Yang Liu, Zhiqun Li, Hao Gao

Research output: Contribution to journal › Article › peer-review

@article{6ca7eb950ee54a06b420e06cdcbdf758,

title = "A 24 GHz PLL with low phase noise for 60 GHz Sliding-IF transceiver in a 65-nm CMOS",

author = "Yang Liu and Zhiqun Li and Hao Gao",

year = "2021",

month = jul,

day = "1",

doi = "10.1016/j.mejo.2021.105106",

language = "English",

volume = "113",

pages = "105106",

journal = "Microelectronics Journal",

issn = "0959-8324",

publisher = "Elsevier BV",

}