32x32 Parallel Analog Architecture For Image Processing Using Log Domain Active Pixel

Research output: Contribution to journal › Article › peer-review

Original language	English
Journal	Acta Technica Napocensis- Electronica-Telecomunicatii (Electronics and Telecommunications)
Publication status	Published - 2010
Externally published	Yes

Cite this

TY - JOUR

T1 - 32x32 Parallel Analog Architecture For Image Processing Using Log Domain Active Pixel

AU - Vornicu, Ion

AU - Goras, Liviu

PY - 2010

Y1 - 2010

M3 - Article

SN - 1221-6542

JO - Acta Technica Napocensis- Electronica-Telecomunicatii (Electronics and Telecommunications)

JF - Acta Technica Napocensis- Electronica-Telecomunicatii (Electronics and Telecommunications)

ER -