Simplicial Computation: A Methodology to Compute Vector-vector Multiplications with Reduced Complexity

In this paper we propose the use of the simplicial algorithm, originally proposed to implement piecewise-linear functions, to compute a digital vector-vector multiplication (VVM) without multiplication operations. We show that when quantization of inputs and parameters are considered, the simplicial method achieves the same accuracy with fewer representation bits for the parameters, assuming the same quantization for the inputs. Actually, in the particular case of a large number of inputs, the simplicial method needs half the number of parameter bits of a linear combination plus one. In addition, we show that the simplicial method requires less energy to compute under an equal number of parameter and input representation bits.