Architecture and Algorithm Co-Design Framework for Embedded Processors in Event-Based Cameras

Jonah P. Sengupta, Martin Villemur, Daniel R. Mendat, Gaspar Tognetti, Andreas G. Andreou

Publikation: Konferenzband/Beitrag in Buch/BerichtKonferenzartikelBegutachtung

Abstract

Neuromorphic cameras that offer low latency and dynamic scene sensing are emerging as a viable technology for energy-aware embedded perceptual systems. In this paper we report on neuromorphic architecture and algorithm exploration for an event-based accelerator for neuromorphic cameras. The system includes a RISC-V CPU and associated peripherals that capture and process event-based visual data coming from a neuromorphic dynamic vision sensor. Mapped into a reconfigurable computing platform (FPGA), we demonstrate a set of event-based visual processing tasks including noise filtering, corner detection, and object tracking.
OriginalspracheEnglisch
Titel2021 IEEE International Symposium on Circuits and Systems (ISCAS)
Herausgeber (Verlag)IEEE Computer Society
Seiten1-5
Seitenumfang5
ISBN (Print)978-1-7281-9201-7
DOIs
PublikationsstatusVeröffentlicht - 28 Mai 2021
Veranstaltung2021 IEEE International Symposium on Circuits and Systems (ISCAS) - Daegu, Korea
Dauer: 22 Mai 202128 Mai 2021

Publikationsreihe

NameProceedings - IEEE International Symposium on Circuits and Systems
Band2021-May

Konferenz

Konferenz2021 IEEE International Symposium on Circuits and Systems (ISCAS)
Zeitraum22/05/2128/05/21

Fingerprint

Untersuchen Sie die Forschungsthemen von „Architecture and Algorithm Co-Design Framework for Embedded Processors in Event-Based Cameras“. Zusammen bilden sie einen einzigartigen Fingerprint.

Dieses zitieren