An Efficient TDC Using a Dual-Mode Resource-Saving Method Evaluated in a 28-nm FPGA

Physik & Astronomy

• resources 100%
• converters 98%
• coders 35%
• delay lines 32%
• counters 25%
• cycles 19%
• pushing 17%
• propagation 17%
• clocks 14%
• linearity 13%
• specifications 13%
• sampling 12%
• bubbles 11%
• requirements 9%
• performance 6%

Ingenieurwesen & Materialwissenschaft

• Field programmable gate arrays (FPGA) 82%
• Electric delay lines 59%
• Bins 27%
• Clocks 21%
• Calibration 19%
• Sampling 17%
• Specifications 16%